3DIC Packaging Pathfinding Technical Manager (QR Pathfinding Program)

3DIC Packaging Pathfinding Technical Manager (QR Pathfinding Program)

At TSMC Arizona, brilliance can ignite a world of innovation and launch a promising future. The world’s most brilliant innovators entrust us to transform their ideas into world-changing products that impact millions of lives. As long as you have the same passion to pursue excellence, you will find your fit here.

TSMC Arizona is looking for a Packaging Metrology Technical Manager to join our 5-nanometer fab, located in sunny Phoenix, Arizona. As a 3DIC Packaging Pathfinding Technical Manager, you will demonstrate a strong sense of reliability and enthusiasm and will possess an attitude that embodies our core values – Integrity, Commitment, Innovation and Customer Trust.

TSMC Arizona’s QR Pathfinding Program is responsible for delivering innovative, world-class metrology and lab/inline analysis solutions to support pathfinding and process/IP development on TSMC cutting edge silicon and 3DIC packaging technology.

Job Description:

Your main responsibilities include:

• Collaborating with HQ QR, integration, modules & 3D packaging team to form a clear understanding of the current technology gaps, and potential future needs in packaging metrology/analysis. Based on this, forming a coherent strategy for development of future capabilities.
• Co-working with packaging metrology vendors to define a metrology roadmap that meets TSMC requirements and enable metrology tools with the required timeline.
• Performing pathfinding work on packaging materials, package fault isolation, package failure or mechanical analysis to understand/predict limiters and provide guidance on the solutions. 
• Participating in university joint-development projects by setting clear goals and delivering results to support HQ teams.

Minimum Qualifications:

Applicants must be legally eligible to work in the United States and have:

• PhD or Master's degree in Materials Science, Electrical Engineering, Physics, Chemistry, Mechanical or related fields.
• 10+ years experience with semiconductor packaging characterization/metrology.
• Extensive experience with substrate and/or packaging process flow and integration.
• Ability to engage in hands-on participation and effectively manage time and resources.
• Excellent verbal and written communication, interpersonal skills and desire to work in collaborative, multidisciplinary teams.
• Ability to travel as needed 

Work Location: Phoenix, AZ

Training Location: Hsinchu, Taiwan

Travel: 10% after initial training.