Summer 2026 - Design DFT/DV Engineer Intern (7410)

Overview of Role: 

Join our dynamic DFT and Verification team at TSMC, where you will play a pivotal role in the development and validation of cutting-edge logic test chips. These chips are instrumental for pioneering yield learning in advanced process nodes and pushing the boundaries of advanced packaging technologies. This internship offers a unique opportunity to tackle complex, real-world challenges at the forefront of semiconductor innovation.

This program is designed for exceptional students currently pursuing a Master’s or Ph.D. degree in Electrical or Computer Engineering, with an expected graduation date in 2026 or 2027. The internship will commence in Summer 2026 and continue through Fall 2026, providing a substantial period for impactful contributions and learning.  

Responsibilities

As an intern on our team, you will contribute to critical DFT and DV tasks, including:  

• Advanced DFT/DV Pattern Simulation & Analysis: Perform block and top-level DFT/DV pattern simulations. Develop and utilize TCL/Verilog monitors to generate comprehensive run-time information, facilitating precise tracking of simulation progress and performance.
• Automated Defect Insertion & Failure Diagnosis: Implement and execute methodologies for inserting predefined static and dynamic defects/fails. Run simulations to collect detailed fail logs, applying automated clustering techniques to efficiently identify and diagnose the root cause of failures.
• ATPG & Test Model Explorer Development: Contribute to the development and maintenance of ATPG and test model (STIL/CTL/BSDL/WGL) explorers. This includes modifying and updating test files in response to evolving design changes and specifications.
• Machine Learning for Simulation Diagnosis: Leverage machine learning and data mining techniques to enhance simulation failure diagnosis, particularly in the context of advanced process nodes. This involves applying cutting-edge analytical methods to complex data sets.

Minimum Qualifications

• Currently enrolled in a Master’s or Ph.D. program in Electrical Engineering, Computer Engineering, or a closely related field, with an expected graduation date in 2026 or 2027.
• Demonstrated strong problem-solving abilities and proficiency in programming languages such as Verilog, Python, and TCL.
• Practical experience utilizing Python for building machine learning models and data analysis.
• Solid fundamental knowledge of Design-for-Test (DFT) techniques, including ATPG, simulation, logic diagnosis, and Scan compression.

Preferred Qualifications

• Familiarity with industry-standard EDA tools such as Synopsys DFT Compiler, Tetramax, and VCS.
• Research or project experience in defect analysis, fault diagnosis, or testing methodologies for advanced semiconductor technologies (e.g., 3D ICs, chiplet interconnects, novel memory architectures).
• Exposure to advanced packaging concepts and their implications for test strategies.
• Experience with SystemVerilog (OOP) and advanced verification methodologies.

Company Description

As a trusted technology and capacity provider, TSMC is driven by the desire to be:

• The world’s leading dedicated semiconductor foundry
• The technology leader with a strong reputation for manufacturing excellence
• Advancing semiconductor manufacturing innovations to enable the future of technology

TSMC pioneered the pure-play foundry business model when it was founded in 1987 and has been the world’s leading dedicated semiconductor foundry ever since. The Company supports a thriving ecosystem of global customers and partners with the industry’s leading process technologies and a portfolio of design enablement solutions to unleash innovation for the global semiconductor industry. With global operations spanning Asia, Europe, and North America, TSMC serves as a committed corporate citizen around the world.

In North America, TSMC has a strong sales and service organization that works with customers by helping them achieve silicon success with cutting-edge technologies and manufacturing excellence. The Company has continued to accelerate its R&D investment and staffing in recent years and is expanding its manufacturing footprint to support customer innovation with 3D IC technologies and optimal manufacturing capacity.

Diversity Statement

TSMC Technology, Inc. is committed to employing a diverse workforce and provides Equal Employment Opportunity for all individuals regardless of race, color, religion, gender, age, national origin, marital status, sexual orientation, gender identity, status as a protected veteran, genetic information, or any other characteristic protected by applicable law.

TSMC is an equal opportunity employer prizing diversity and inclusion. We are committed to treating all employees and applicants for employment with respect and dignity. If you require reasonable accommodation due to a disability during the application or the recruiting process, please feel free to notify us at g_accommodations@tsmc.com. TSMC confirms to all applicants its commitment to meet TSMC’s obligations under applicable employment law. Reasonable accommodations will be determined on a case-by-case basis. 

For positions requiring access to technical data subject to export control regulations, including Export Administration Regulations, TSMC Technology, Inc. may have to obtain export licensing approval from the U.S. Government for certain individuals.  All employment is contingent upon TSMC Technology, Inc. obtaining any export license or other approval that may be required by the U.S. Government.

Pay Transparency Statement

At the time of this posting, this role typically pays an hourly rate between $38 and $45 per hour. The range displayed reflects the minimum and maximum target for new hires. Actual pay may be more or less than the posted range. Factors that influence pay include the individual's skills, qualifications, education, experience and the position level and location.