IO Cell Designer

Job scope :

1.Advanced (FINFET/Nanosheet), specialty, automotive, 2.5D/3D chiplet IO circuit design (w/ built-in circuit co-optimized ESD protection)

2. IO testchip design & library timing/power kits characterization.


Qualifications (Education, Skills, Certificates, etc.) :

1. EE/Physics MS or above (PhD is preferred) with following one (or multi-) technical knowledge & expertise

- Semiconductor device

- Analog/digital/RF/power circuit

- Signal/power integrity, IREM and timing analysis & sign-off

- ESD protection




All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, or disability.

Date:  Jul 9, 2024
Country/Region:  JP
City:  Yokohama
Company:  TSMC Design Tech. Japan, Inc.