APR/Physical Design Engineer 1

Job Description:

'-Memory architecture design (SRAM, DRAM, MRAM, RRAM, PCRAM and eFlash)
-Read and write critical path design and analysis
-Design of key building blocks (sensing, analog, high voltage, DFT)
-Chip-level design verification
-Embedded non-volatile memory compiler and productization
-Co-work with product/reliability engineer on silicon characterization and reliability qualification

 

Qualifications:

'-The candidates should have at least bachelor degree in relevant field.
-Memory experts in the field of SRAM.
-Familiar with bit cell characteristics (Vmin, bit cell performance, write margin), sense amplifier design, high sigma variation analysis, race check, margin signoff. 
-Knowledge on high speed and low Vmin design is a plus.
-Highly welcome candidates who have less experience but have good Memory Design design experience, working attitude and are self-motivated.
-Good command of Japanese. English is a plus.

 

 

 

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, or disability.

Date:  Jul 9, 2024
Country/Region:  JP
City:  Yokohama or Osaka
Company:  TSMC Design Tech. Japan, Inc.